Unit 'exec' Package
[Overview][Constants][Types][Procedures and functions][Variables][Index] [#os4units]

TExecBase

Declaration

Source position: exec.pas line 1077

type TExecBase = record

  LibNode: TLibrary;

  

Standard library structure

  SoftVer: Word;

  

Kickstart release number

  LowMemChkSum: SmallInt;

  

Lower memory checksum

  ChkBase: LongWord;

  

System base address

  ColdCapture: Pointer;

  

Cold boot address

  CoolCapture: Pointer;

  

  WarmCapture: Pointer;

  

Warm start address

  SysStkUpper: Pointer;

  

System stack: upper border

  SysStkLower: Pointer;

  

System stack: lower border

  MaxLocMem: LongWord;

  

Maximal useable memory

  DebugEntry: Pointer;

  

Jump address for debugger

  DebugData: Pointer;

  

Pointer to data for debugger

  AlertData: Pointer;

  

Pointer to alert data

  MaxExtMem: Pointer;

  

Maximal available external memory

  ChkSum: Word;

  

Checksum of the upper values

  IntVects: array [0..15] of TIntVector;

  

Vector table of interrupts

  ThisTask: PTask;

  

Pointer of the currently running task

  IdleCount: LongWord;

  

Idle Counter

  DispCount: LongWord;

  

Dispatch Counter

  Quantum: Word;

  

CPU time of every task

  Elapsed: Word;

  

  SysFlags: Word;

  

Used cput time

  IDNestCnt: ShortInt;

  

interrupt disable nesting count

  TDNestCnt: ShortInt;

  

task disable nesting count

  AttnFlags: Word;

  

special attention flags (readable)

  AttnResched: Word;

  

rescheduling attention

  ResModules: Pointer;

  

resident module array pointer

  TaskTrapCode: Pointer;

  

Task - Pointer

  TaskExceptCode: Pointer;

  

  TaskExitCode: Pointer;

  

  TaskSigAlloc: LongWord;

  

Task - Signals

  TaskTrapAlloc: Word;

  

Task - Traps

  MemList: TList;

  

List of available memory.

  ResourceList: TList;

  

List of available resources.

  DeviceList: TList;

  

List of available devices.

  IntrList: TList;

  

List of available Interrupts

  LibList: TList;

  

List of open libraries

  PortList: TList;

  

List of open Ports.

  TaskReady: TList;

  

Tasks with state Ready

  TaskWait: TList;

  

Tasks with State waiting for singal

  SoftInts: array [0..4] of TSoftIntList;

  

  LastAlert: array [0..3] of LongInt;

  

Last alert number

  VBlankFrequency: Byte;

  

  PowerSupplyFrequency: Byte;

  

  SemaphoreList: TList;

  

  KickMemPtr: Pointer;

  

Pointer to queue of mem lists

  KickTagPtr: Pointer;

  

Pointer to rom tag queue

  KickCheckSum: Pointer;

  

Checksum for mem and tags

  ex_Pad0: Word;

  

  ex_LaunchPoint: LongWord;

  

  ex_RamLibPrivate: Pointer;

  

  ex_EClockFrequency: LongWord;

  

  ex_CacheControl: LongWord;

  

Private to CacheControl calls

  ex_TaskID: LongWord;

  

Next available Task ID

  ex_Reserved1: array [0..4] of LongWord;

  

  ex_MMULock: Pointer;

  

  ex_Reserved2: array [0..2] of LongWord;

  

  ex_MemHandlers: TMinList;

  

Memory Handler List

  ex_MemHandler: Pointer;

  

  MainInterface: PInterface;

  Private01: Pointer;

  Private02: LongWord;

  Private03: Pointer;

  Private04: Pointer;

  Private05: Pointer;

  Private06: TList;

  Private07: Pointer;

  EmuWS: Pointer;

end;


Documentation generated on: 2021-07-30