Unit 'go32' Package
[Overview][Constants][Types][Procedures and functions][Variables][Index] [#rtl]

trealregs

Record describing all processor registers.

Declaration

Source position: go32.pp line 62

type trealregs = record

  case Integer of

    1: (

        EDI: LongInt;

  

EDI register.

        ESI: LongInt;

  

ESI register.

        EBP: LongInt;

  

EBP register.

        Res: LongInt;

  

RES register.

        EBX: LongInt;

  

EBX register.

        EDX: LongInt;

  

EDX register.

        ECX: LongInt;

  

ECX register.

        EAX: LongInt;

  

EAX register.

        Flags: Word;

  

Flags register.

        ES: Word;

  

ES register.

        DS: Word;

  

DS register.

        FS: Word;

  

FS register.

        GS: Word;

  

GS register.

        IP: Word;

  

IP register.

        CS: Word;

  

CS register.

        SP: Word;

  

SP register.

        SS: Word;

  

SS register.

      );

    2: (

        DI: Word;

  

DI register.

        DI2: Word;

  

DI2 register.

        SI: Word;

  

SI register.

        SI2: Word;

  

SI2 register.

        BP: Word;

  

BP register.

        BP2: Word;

  

BP2 register.

        R1: Word;

  

R1 register.

        R2: Word;

  

R2 register.

        BX: Word;

  

BX register.

        BX2: Word;

  

BX2 register.

        DX: Word;

  

DX register.

        DX2: Word;

  

DX2 register.

        CX: Word;

  

CX register.

        CX2: Word;

  

CX2 register.

        AX: Word;

  

AX register.

        AX2: Word;

  

AX2 register.

      );

    3: (

        stuff: array [1..4] of LongInt;

  

Pad data.

        BL: Byte;

  

BL register.

        BH: Byte;

  

BH register.

        BL2: Byte;

  

BL2 register.

        BH2: Byte;

  

BH2 register.

        DL: Byte;

  

DL register.

        DH: Byte;

  

DH register.

        DL2: Byte;

  

DL2 register.

        DH2: Byte;

  

DH register.

        CL: Byte;

  

CL register.

        CH: Byte;

  

CH register.

        CL2: Byte;

  

CL2 register.

        CH2: Byte;

  

CH2 register.

        AL: Byte;

  

AL register.

        AH: Byte;

  

AH register.

        AL2: Byte;

  

AL2 register.

        AH2: Byte;

  

AH2 register.

      );

    4: (

        RealEDI: LongInt;

  

Real EDI register.

        RealESI: LongInt;

  

Real ESI register.

        RealEBP: LongInt;

  

Real EBP register.

        RealRES: LongInt;

  

Real RES register.

        RealEBX: LongInt;

  

Real EBX register.

        RealEDX: LongInt;

  

Real EDX register.

        RealECX: LongInt;

  

Real ECX register.

        RealEAX: LongInt;

  

Real EAX register.

        RealFlags: Word;

  

Real flags.

        RealES: Word;

  

Real ES register.

        RealDS: Word;

  

Real DS register.

        RealFS: Word;

  

Real GS register.

        RealGS: Word;

  

Real GS register.

        RealIP: Word;

  

Real IP register.

        RealCS: Word;

  

Real CS register.

        RealSP: Word;

  

Real SP register.

        RealSS: Word;

  

Real SS register.

      );

end;

Description

The trealregs type contains the data structure to pass register values to a interrupt handler or real mode callback.


Documentation generated on: Jul 24 2023